1. Technical Field
The present invention relates generally to a voltage selection circuit that selects and outputs one of a plurality of input voltages depending on a control signal, and, more particularly, to technology for outputting a stable voltage.
2. Description of the Related Art
When an electronic circuit is developed, a circuit (hereinafter, a “voltage selection circuit”) may be needed to select and output one of a plurality of input voltages depending on a control signal. For example, as shown in FIG. 5, such a circuit can include MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
In FIG. 5, a P-MOSFET (P-type MOSFET, MOSFET of P type, M1) and an N-MOSFET (N-type MOSFET, MOSFET of N type, M2) configure a first inverter INV1. A P-MOSFET (M3) and an N-MOSFET (M4) configure a second inverter INV2. A P-MOSFET (M5) and an N-MOSFET (M6) configure a first transmission gate SW1. A P-MOSFET (M7) and an N-MOSFET (M8) configure a second transmission gate SW2. Diodes D1 to D4 are parasitic diodes of the MOSFETs (M5 to M8).
IN (“H” or “L”) is a control signal input to the first inverter INV1. The output of the first inverter INV1 is input to the second inverter INV2, the gate of the MOSFET (M5), and the gate of the MOSFET (M8). The output of the second inverter INV2 is input to the gate of the MOSFET (M6) and the gate of the MOSFET (M7)
A first input voltage V1 is selected depending on the control signal IN and is applied to the source of the MOSFET (M5) and the source of the MOSFET (M6). A second input voltage V2 is selected depending on the control signal IN and is applied to the source of the MOSFET (M7) and the source of the MOSFET (M8).
The drains of the MOSFETs (M5 to M8) are connected in common and, through this connection line, an output voltage V3 is output based on either the first input voltage V1 or the second input voltage V2 selected depending on the control signal IN.
It is assumed that “H” is input as the control signal IN for the voltage selection circuit shown in FIG. 5. In this case, “L” is input to the gate of the MOSFET (M5) and the gate of the MOSFET (M8) and “H” is input to the gate of the MOSFET (M6) and the gate of the MOSFET (M7). Therefore, the transmission gate SW1 is turned on while the transmission gate SW2 is turned off, and the output voltage V3 is output as a voltage based on the first input voltage V1 in this case.
On the other hand, it is assumed that “L” is input as the control signal IN for the voltage selection circuit shown in FIG. 5. In this case, “H” is input to the gate of the MOSFET (M5) and the gate of the MOSFET (M8) and “L” is input to the gate of the MOSFET (M6) and the gate of the MOSFET (M7). Therefore, the transmission gate SW1 is turned off while the transmission gate SW2 is turned on, and the output voltage V3 is output as a voltage based on the second input voltage V2 in this case.
FIG. 6 shows another example of the voltage selection circuit. In FIG. 6, a P-MOSFET (M1) and an N-MOSFET (M2) configure a first inverter INV1. A P-MOSFET (M3) and an N-MOSFET (M4) configure a second inverter INV2. The drain and gate of the N-MOSFET (M5) are connected in common with the drain and gate of the N-MOSFET (M6), respectively, to configure a first switch circuit SW1. The drain and gate of the N-MOSFET (M5) are connected in common with the drain and gate of the N-MOSFET (M6), respectively, to configure a first switch circuit SW1. The drain and gate of the N-MOSFET (M7) are connected in common with the drain and gate of the N-MOSFET (M8), respectively, to configure a second switch circuit SW2. Diodes D1 to D4 are parasitic diodes of the MOSFETs (M5 to M8).
In the voltage selection circuit shown in FIG. 6, a control signal IN (“H” or “L”) is input to the first inverter INV1. The output of the first inverter INV1 is input to the second inverter INV2, the gate of the MOSFET (M7), and the gate of the MOSFET (M8). The output of the second inverter INV2 is input to the gate of the MOSFET (M5) and the gate of the MOSFET (M6).
A first input voltage V1 is selected depending on the control signal IN and is applied to the source of the MOSFET (M6). A second input voltage V2 is selected depending on the control signal IN and is applied to the source of the MOSFET (M8). The source of the MOSFET (M5) and the source of the MOSFET (M7) are connected in common and, through this connection line, an output voltage V3 is output based on either the first input voltage V1 or the second input voltage V2 selected depending on the control signal IN.
It is assumed that “H” is input as the control signal IN for the voltage selection circuit shown in FIG. 6. In this case, “H” is input to the gate of the MOSFET (M5) and the gate of the MOSFET (M6) and “L” is input to the gate of the MOSFETs (M7, M8). Therefore, the switch circuit SW1 is turned on while the switch circuit SW2 is turned off, and the output voltage V3 is output as a voltage based on the first input voltage V1 in this case.
On the other hand, if “H” is input as the control signal IN, “L” is input to the gate of the MOSFET (M5) and the gate of the MOSFET (M6) and “H” is input to the gate of the MOSFET (M7) and the gate of the MOSFET (M8). Therefore, the switch circuit SW1 is turned off while the switch circuit SW2 is turned on, and the output voltage V3 is output as a voltage based on the second input voltage V2 in this case (see, Japanese Patent Application Laid-Open Publication Nos. 1998-84271 and 2003-32090).
By the way, in the circuit shown in FIG. 5, for example, if the control signal IN is “H”, the MOSFET (M5) and the MOSFET (M6) are turned on, and the MOSFET (M7) and the MOSFET (M8) are turned off. If V1+Vd1<V2 is satisfied in this situation (Vd1 is a forward voltage of the parasitic diodes D3, D4), the parasitic diodes D3, D4 become conductive and an electric current is applied through a route of the parasitic diodes D3, D4→the MOSFETs (M5, M6). Similarly, when the control signal IN is “L”, if V2+Vd2<V1 is satisfied (Vd2 is a forward voltage of the parasitic diodes D1, D2), the parasitic diodes D1, D2 become conductive and an electric current is applied through a route of the parasitic diodes D1, D2→the MOSFETs (M7, M8).
On the other hand, in the circuit shown in FIG. 6, for example, if the control signal IN is “H”, the MOSFET (M5) and the MOSFET (M6) are turned on, and the MOSFET (M7) and the MOSFET (M8) are turned off. If V1<Vss−Vt (Vt is a voltage necessary for turning on the MOSFET (M7)) and V1+Vd3<V2 (Vd3 is a forward voltage of the parasitic diode D4) are satisfied in this situation, the gate voltage of the MOSFET (M7)=Vss is satisfied; the output voltage V3=the first input voltage V1 is satisfied because the MOSFET (M5) and the MOSFET (M6) are turned on; the gate-source voltage Vos of the MOSFET (M7)>Vt is satisfied; and the MOSFET (M7) is turned on. Therefore, an electric current is applied through a route of the parasitic diode D4 of the MOSFET (M7)→the parasitic diode D1 of the MOSFET (M5)→the MOSFET (M6).
Similarly, in the case of the control signal IN of “L”, if the above voltage relationship is satisfied, the MOSFET (M6) is turned on and an electric current is applied through a route of the MOSFET (M8)→the MOSFET (M7) →the parasitic diode D1 of the MOSFET (M5) →the MOSFET (M6).
Since the current loss occurs in either circuit of FIGS. 5 and 6, the output voltage V3 becomes unstable, and the same voltage as the input voltage V1 and the second input voltage V2 cannot necessarily be acquired as the output voltage V3.
The present invention was conceived in view of the above problems and it is therefore the object of the present invention to provide a voltage selection circuit that can output a voltage equivalent to the input voltage.